Since the discovery of carbon nanotubes in 1991 by the Japanese physicist Dr. Sumio Iijima, voluminous research has been done in the field of carbon nanotubes—a one-dimensional material for numerous applications, including for possible replacement of silicon used in the fabrication of CMOS chips. One interesting feature of carbon nanotubes is that they can be metallic or semiconducting with a bandgap depending on their diameter. Since carbon nanotubes are planar graphene sheets wrapped into tubes, their electrical characteristics vary with the tube diameter and the wrapping angle of the graphene. Carbon nanotubes can be manipulated in a controlled way in its position, shape, and orientation with the use of atomic force microscope.
Semiconductor Research Corporation in its report 2003 International Technology Roadmap of Semiconductors has referred to several nonclassical devices including those based on carbon nanotubes, which could be candidates for future technology as Moore’s law approaches its end close to year 2020. Interconnects in sub-nanometer complementary metal–oxide–semiconductor (CMOS) technology node are facing problems in copper interconnects because of their increased resistance. Carbon nanotubes as an interconnect material and their integration with CMOS process offer the much-awaited solution. In search of nonclassical devices and related technologies, both carbon nanotube–based field-effect transistors and metallic carbon nanotube interconnects are being explored extensively for emerging logic devices for very large-scale integration (VLSI). Transistors in integrated circuit design for analog, digital, and mixed-signal applications including those for radio frequency operation require equivalent circuit models for use with device- and circuit-level simulators. Although various models for carbon nanotube–based transistors and interconnects have been proposed in the literature, an integrated approach to make them compatible with the present simulators is yet to be achieved. This book makes an attempt in this direction. It can be used to develop models for both transistors and interconnects based on carbon nanotubes through the fundamental understanding of the material and solid-state physics, and made compatible with commercial integrated circuit design simulators through Verilog–AMS codes for design and analysis of integrated circuits.
