Emerging Devices for Low-Power and High-Performance Nanosystems
Jenny Stanford Series on Intelligent Nanosystems

Emerging Devices for Low-Power and High-Performance Nanosystems

Physics, Novel Functions, and Data Processing

edited by Simon Deleonibus

438 pages, 153.00 x 229.00 mm

  • Hardcover
  • ISBN: 9789814800112
  • Published: December 2018

  • eBook - PDF
  • ISBN: 9780429458736

The history of information and communications technologies (ICT) has been paved by both evolutive paths and challenging alternatives, so-called emerging devices and architectures. Their introduction poses the issues of state variable definition, information processing, and process integration in 2D, above IC, and in 3D. This book reviews the capabilities of integrated nanosystems to match low power and high performance either by hybrid and heterogeneous CMOS in 2D/3D or by emerging devices for alternative sensing, actuating, data storage, and processing. The choice of future ICTs will need to take into account not only their energy efficiency but also their sustainability in the global ecosystem.

This book, the third volume of the Jenny Stanford Series on Intelligent Nanosystems, features nine chapters divided in two parts reporting on junctionless transistors, III–V/Si heterostructure-based tunnel field-effect transistors, NEMS switches for logic and memory, NEMS switches for ultra-low-power adiabatic architecture design, single-spin quantum bit manipulation in pMOSFET or electron-based coupled quantum dots both on silicon, metal/insulator/metal, and metal/phase change material/metal-based memristors’ potential to dual-store or process data, bio-inspired neuromorphic 1 transistor–1 resistor circuit architectures, and nanomagnetic logic architectures based on multilayered nanomagnets exchanging bias vertically and horizontally.

The book will be of particular interest to microelectronics and nanoelectronics device and circuit design engineers, physicists, chemists, and materials scientists interested in unconventional CMOS-based architectures and emerging devices potentially competing against scaled CMOS, the co-integration of these devices with CMOS components, and their nanofabrication techniques